Embodiments of the present invention relate to the ashing of resist and removal of process residues that form on a substrate.
In substrate fabrication processes, semiconductor, dielectric, and conductor materials are formed on a substrate and etched to form patterns of gates, vias, contact holes and interconnect features. These materials are typically formed by chemical vapor deposition (CVD), physical vapor deposition (PVD), oxidation and nitridation processes. For example, in CVD processes, a reactive gas is used to deposit a layer of material on the substrate, and in PVD processes, a target is sputtered to deposit material on the substrate. In oxidation and nitridation processes, a layer of oxide or nitride, typically silicon dioxide or silicon nitride, respectively, is formed by exposing the substrate to a suitable gaseous environment. In etching processes, a patterned etch-resistant mask of photoresist or hard mask is formed on the substrate by photolithographic methods, and the exposed portions of the substrate are etched by an energized gas.
As the size of circuit features being formed on the substrate continue to shrink and the feature geometry becomes more advanced, low-k dielectric materials are being increasingly used to cover the interconnect features. Low-k dielectric materials have a low dielectric constant “k” that is typically less than about 3. Examples of low-k dielectric materials include compositions of silicon, oxygen, carbon, and even hydrogen, such as for example, BLACK DIAMOND™, a dielectric formed by CVD. Low-k dielectric layers reduce the RC delay time in an integrated circuit allowing corresponding increases in density of the interconnect features.
However, when etching low-k dielectric materials, excessive amounts of process residues often form on the substrate because the process gas is designed to deposit sidewall polymer on the sidewalls of the features being etched into the low-k dielectric layer. For example, in dual damascene patterning, a low-k dielectric material to be etched relies on sidewall polymer deposition to achieve the desired selectivity to photoresist and barrier film. Polymer deposition is used to protect the photoresist and to minimize pinhole formations and striations on the substrate. However, this same polymer also deposits in undesired places such as the backside of the substrate as process residues, for example, when a substrate rests on and extends slightly beyond a substrate support. These residue deposits often flake off and contaminate the substrate and chamber environment.
Conventional process residue removal methods involve processing the substrate in an energized gas to remove the residues on the exposed front surface of the substrate. However, conventional residue removal methods often fail to suitably remove process residues from the backside surface of the substrate. Further, residue removal methods which are successful often end up damaging the low-k dielectric material on the substrate. Other techniques for cleaning the backside surface of the substrate, such as grinding, excessively scratch or otherwise damage the substrate surface. Conventional cleaning methods also often erode away an excessive amount of the underlying substrate during the cleaning process, which limits the number of times the substrate can be reclaimed for re-use. Accordingly, conventional cleaning techniques do not always provide satisfactory process residue removal.
Thus, it is desirable to remove the process residue deposits from the backside surface of a substrate. It is further desirable to remove such process residues without excessive damage to low-k dielectric material on the substrate.